Semiconductor device and method for manufacturing the same

ABSTRACT

A resin sealed type semiconductor device, is provided with a semiconductor chip which has a pad formed on a main surface thereof, an insulating film which is formed on a part of the pad and on the main surface of the semiconductor chip, an interconnection which is formed on a part of the insulating film and which is electrically connected to the pad, a sealing resin which seals the interconnection and the insulating film, a post formed on the interconnection which has a surface exposed to outside of the sealing resin which is electrically connected to the interconnection, a bump electrode which is mounted on the exposed surface of the post and a radiation post which is formed on the insulating film and which has a surface exposed to outside of the sealing resin.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention generally relates to technology formanufacturing a semiconductor device, and more particularly, to asemiconductor device which has the improved radiation efficiency and amethod for manufacturing the semiconductor device.

[0003] This application is a counterpart of Japanese patent application,Ser. No. 104732/2000, filed Apr. 6, 2000, the subject matter of which isincorporated herein by reference.

[0004] 2. Description of the Related Art

[0005] Recently, spread of the mobile terminal has been acceleratedtoward smaller, thinner and lighter mobile terminal. In order to achievecompactness, effort has been made to reduce the size of thesemiconductor device mounted on the mobile terminal. Such efforts arefocused on the development of semiconductor devices having asemiconductor package in the size of a chip referred to as Chip SizePackage (hereinafter CSP).

[0006] The size of CSP is substantially the same as that of the chip orslightly large as that of the CSP. There is the resin sealed typesemiconductor device which is referred to as Wafer Level Chip SizePackage/Wafer Level Chip Scale Package (hereinafter W-CSP) among CSP.The size of W-CSP is the same as that of the chip.

[0007] The conventional CSP type semiconductor device will be describedwith reference to FIGS. 12-14.

[0008]FIG. 12 is an entire perspective view showing a wafer and theconventional resin sealed type semiconductor device taken by dicing thewafer. FIG. 13 is a cross sectional view taken line A-A of thesemiconductor device shown in FIG. 12. As shown in FIG. 13, theconventional resin sealed type semiconductor device comprises asemiconductor chip 1301, a post 1302, a solder bump 130, a re-tribute1304, a sealing resin 1305, a pad 1306 and an insulating film 1307. Thesemiconductor chip 1301 has a main surface 1301 a in which a circuit,e.g. a transistor etc is formed. The pad 1306 which is an aluminum pad,is formed on the main surface 1301 a of the semiconductor chip 1301. Theinsulating film 1307 is formed on the main surface 1301 a of thesemiconductor chip 1301. The re-tribute 1304 is formed on the insulatingfilm 1307 and the main surface 1301 a of the semiconductor chip 1301,and is electrically connected to the pad 1306 and the post 1302. There-tribute 1304 functions as an interconnection, which is made ofcopper. The post 1302 which is made of copper, is formed on there-tribute 1304. The solder bump 1303 is mounted on upper surface of thepost 1302, and is electrically connected to the post 1302. The solderbump 1303 is a spherical electrode, which is made of copper. The sealingresin 1305 seals the insulating film 1307, the re-tribute 1304 and thepost 1302 except for the solder bump 1303. Now, due to an explanatoryconvenience, the number of the post 1302 etc is limited to one or two inthe drawings.

[0009] Processes which include a process of mounting the solder bump1303, are performed in a wafer state. After these processes arecompleted, the wafer is diced. Thereby, the conventional resin sealedtype semiconductor device which is called as CSP, is obtained (refer toFIG. 13).

[0010] A radiation pass of the conventional resin sealed typesemiconductor device will be described with reference to FIG. 14. Asshown in FIG. 14, the conventional resin sealed type semiconductordevice is mounted on a substrate 1401 via the solder bumps 1303. Anarrow shown in FIG. 14 designates the radiation pass of the heat in casethe heat is radiated from the semiconductor chip 1301 to outside of thesemiconductor device. As shown in FIG. 14, the heat generated near themain surface 1301 a of the semiconductor chip 1301, is radiated via theposts 1302, the solder bumps 1303 and the substrate 1401.

[0011] However, the main surface 1301 a of the semiconductor chip 1301is covered with the sealing resin 1305 which has a low thermalconductivity. Therefore, the radiation pass near the main surface 1301a, is limited to the pass explained above. Consequently, the heat nearthe main surface is not enough radiated so that the demand is satisfied.

SUMMARY OF THE INVENTION

[0012] It is an object of the present invention to provide a resinsealed type semiconductor device that may improve radiation efficiency.

[0013] It is another object of the present invention to provide a methodfor making a semiconductor device that may reduce manufacturing costs.

[0014] It is still another object of the present invention to provide amethod for making a semiconductor device that may reduce manufacturingsteps.

[0015] It is further object of the present invention to provide a methodof making a semiconductor device that may reduce a manufacturing timeperiod.

[0016] According to one aspect of the present invention, for achievingthe above object, there is provided a resin sealed type semiconductordevice, is provided with a semiconductor chip having a pad which isformed on a main surface thereof, an insulating film formed on a part ofthe pad and on the main surface of the semiconductor chip, aninterconnection formed on a part of the insulating film, beingelectrically connected to the pad, a sealing resin sealing theinterconnection and the insulating film, a post unit formed on theinsulating film, having an edge side exposed to outside of the sealingresin, being electrically connected to the interconnection, a bumpformed on the exposed edge side of the post unit and a radiation postunit formed on the insulating film, having an edge side exposed tooutside of the sealing resin.

[0017] The above and further objects and novel features of the inventionwill more fully appear from the following detailed description, appendedclaims and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018]FIG. 1 is a plane view showing a resin sealed type semiconductordevice according to a first preferred embodiment of the presentinvention.

[0019]FIG. 2 is a cross sectional view showing a resin sealed typesemiconductor device according to a first preferred embodiment of thepresent invention.

[0020]FIG. 3 is a cross sectional view showing the radiation paths of aresin sealed type semiconductor device according to a first preferredembodiment of the present invention.

[0021]FIG. 4(a) through FIG. 4(d) are process diagrams showing a methodfor manufacturing a resin sealed type semiconductor device according tofirst, second and third embodiments of the present invention.

[0022]FIG. 5(a) through FIG. 5(d) are process diagrams showing a methodfor manufacturing a resin sealed type semiconductor device according tofirst, second and third embodiments of the present invention.

[0023]FIG. 6 is a plane view showing a resin sealed type semiconductordevice according to a second embodiment of the present invention.

[0024]FIG. 7 is a cross sectional view showing a resin sealed typesemiconductor device according to a second embodiment of the presentinvention.

[0025]FIG. 8 is a cross sectional view showing radiation passs of aresin sealed type semiconductor device according to a second embodimentof the present invention.

[0026]FIG. 9 is a cross sectional view showing a resin sealed typesemiconductor device according to a third embodiment of the presentinvention.

[0027]FIG. 10(a) through FIG. 10(e) are process diagrams showing amethod for manufacturing a resin sealed type semiconductor deviceaccording to a third embodiment of the present invention.

[0028]FIG. 11(a) through FIG. 11(b) are plan showing an arrangementrelationship between posts and radiation posts.

[0029]FIG. 12 is a perspective view showing relationship between a waferand a resin sealed type semiconductor device.

[0030]FIG. 13 is a cross sectional view showing a structure of a resinsealed type semiconductor device of the related art.

[0031]FIG. 14 is a cross sectional view showing a radiation path of aresin sealed type semiconductor device of the related art.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] In what follows, the present invention will be explained withembodiments of the present invention. However, the invention is notlimited to the specific embodiments. Moreover, not all the combinationsof the characteristics of the present invention described in theembodiments are essential to the problem solving means by the presentinvention.

[0033] (First Preferred Embodiment)

[0034] A resin sealed type semiconductor device according to a firstpreferred embodiment of the present invention will be described withreference to FIGS. 1-5.

[0035] Frist, the composition of the resin sealed type semiconductordevice according to the first preferred embodiment will be describedwith reference to FIGS. 1-2. FIG. 1 is a plane view showing the resinsealed type semiconductor device having a wafer level chip size packagestructure individually divided from a wafer. FIG. 2 is a cross sectionalview taken line B-B of the semiconductor device shown in FIG. 1. Theresin sealed type semiconductor device according to the first preferredembodiment of the present invention comprises a semiconductor chip 201,a plurality of posts 202, a plurality of solder bumps 203, a pluralityof re-tribute 204, a sealing resin 205, a plurality of pads 206, aradiation post 207 and an insulating film 208. As illustrated in FIG. 1,two solder bumps 203 are located at both sides of the radiation post207. However, owing to an explanatory circumstance, the number of thepads, the re-tributes, the posts and the solder bumps is limited in FIG.2.

[0036] The semiconductor chip 201 has a main surface 201 a. The circuitssuch as a transistor etc. are formed on the main surface 201 a of thesemiconductor chip 201.

[0037] The pads 206 which are preferably made of aluminum or the like,and are formed on the main surface 201 a of the semiconductor chip 201.

[0038] The insulating film 208 is formed on the main surface 201 a ofthe semiconductor chip 201 and on a partial surface of the pads 206. Theinsulating film 208 protects the main surface 201 a.

[0039] The re-tributes 204 which are preferably made of copper, aluminumor titanium or the like, and are formed on the pads 206 and on theinsulating film 208. The re-tributes 204 are electrically connected tothe pads 206. The re-tribute 204 is an interconnection in order tofreely adjust a position of the post 202 formed on thereof. Therefore,the posts 202 can be formed on any position which is not on the pads206, in addition to on the pads 206.

[0040] The posts 202 are preferably made of copper or aluminum or thelike, and each one has a first end side 202 a and a second end side 202b. As mentioned above, the posts 202 are formed on the re-tributes 204,and are electrically connected to the re-tributes 204. The second endside 202 b is the opposite side of the re-tributes 204.

[0041] The solder bumps 203 which have the spherical shape, and arepreferably made of solder, and each one is mounted on the first end side202 a of the post 202. The solder bumps 203 are electrically connectedto the posts 202. As a result, the pads 206, the re-tributes 204, theposts 202 and the solder bumps 203 are electrically connected to oneanother.

[0042] The radiation post 207 which is preferably made of copper oraluminum or the like, and is formed at the center position of the mainsurface 201 a of the semiconductor chip 201. The radiation post 207 hasa main surface 207 a and a back surface 207 b. The main surface 207 a ofthe radiation post 207 is exposed to the outside of the sealing resin205 and the back surface 207 b of the radiation post 207 is contactedwith the insulating film 208.

[0043] It is desirable that the radiation post 207 is formed so as notto contact with the posts 202, the pads 206 or the re-tributes 204. Ifthe radiation post 207 is contacted with the posts 202, this contactcauses the posts 202 to electrically connect to each other, but it hasnothing to do with a role as a radiation post. Therefore, there is apossibility that the posts 202 have a state of short-circuit. Thus, thismeans that the posts 202 do not lose a function as the electrode. Thefunction of the re-tributes 204 and the pads 206 are also the same asthat explained above.

[0044] The sealing resin 205 which is preferably made of epoxy resin orthe like, and seals the posts 202, the re-tributes 204, the radiationpost 207 and the insulating film 208. The main surface 207 a of theradiation post 207 is exposed to the outside of the sealing resin 205.

[0045] The radiation passes of the resin sealed type semiconductordevice according to a first preferred embodiment of the presentinvention will be described with reference to FIG. 3. FIG. 3 is a crosssectional view showing radiation passes of a resin sealed typesemiconductor device according to a first preferred embodiment. Theresin sealed type semiconductor device is connected to a substrate 301via the solder bumps 203. The arrows shown in FIG. 3 designate theroutes conducting the heat that occurres in the semiconductor chip 201.As shown in FIG. 3, the heat occurred in the semiconductor chip 201 isradiated to the outside of the semiconductor chip 201 via the back andside surfaces of the semiconductor chip 201. In addition, the heat nearthe main surface 201 a of the semiconductor chip 201 is conducted to thesubstrate 301 via the posts 202 and the solder bumps 203, and thus theheat is radiated to the outside of the resin sealed type semiconductordevice. Furthermore, the heat near the main surface 201 a of thesemiconductor chip 201 is radiated to an area which exists between theresin sealed type semiconductor device according to the first preferredembodiment and the substrate 301 via the radiation post 207.

[0046] The resin sealed type semiconductor device according to the firstpreferred embodiment of the present invention is capable of radiatingthe heat occurred in the semiconductor chip 201 to its outside by usingthe posts 202, the solder bumps 203 and the radiation post 207.Therefore, the resin sealed type semiconductor device according to thefirst preferred embodiment of the present invention is capable ofradiating the heat efficiently as compared with the conventional resinsealed type semiconductor device. Thus, the resin sealed typesemiconductor device according to the first preferred embodiment of thepresent invention is capable of reducing thermal resistance andcontrolling high temperature of the semiconductor chip as compared withthe conventional resin sealed type semiconductor device. As a result,the resin sealed type semiconductor device according to the firstpreferred embodiment having a longer lifetime can be obtained.

[0047] The process of manufacturing the resin sealed type semiconductordevice according to the first preferred embodiment of the presentinvention will be described with reference to FIGS. 4A-4D and 5A-5D. Thedrawings are the schematic enlarged sectional views a part of the wafer.

[0048] First, as shown in FIG. 4A, the wafer (the semiconductor chip)201 having the main surface 201 a on which a circuit such as atransistor or the like is formed, is prepared. The pads 206 are formedon the main surface 201 a of the wafer 201. The re-tributes 204 whichare electrically connected to the pads 206, are formed on the pads 206and the insulating film 208. The insulating film 208 is formed on themain surface 201 a, except for an area on which the re-tributes 204 areformed.

[0049] Next, as shown in FIG. 4B, a photosensitivity resin called as aphotoresist film 401 is spin-coated on the insulating film 208 and there-tributes 204. The film thickness of the photoresist film 401 needsheight of the posts 202 and the radiation post 207 to be formed as thefollowing steps.

[0050] Next, as shown in FIG. 4C, the photoresist film 401 is masked,and the masked photoresist film 401 is lithographed in order to expose apart of the re-tributes 204 and the insulating film 208. The size of themask is set to the size of the posts 202 and the radiation post 207. Theexposed photoresist film 401 is developed, and thus openings are formedin the photoresist film 401.

[0051] Next, as shown in FIG. 4D, the wafer with the photoresist film401 having the openings, is soaked in a plating liquid and thus theopenings are filled with the plating liquid. A kind of the platingliquid depends on the material of the posts 202 and the radiation post207. If the posts 202 and the radiation post 207 are made of copper oraluminum, a copper plating liquid and an aluminum plating liquid areused.

[0052] Next, as shown in FIG. 5A, after the plating liquid becomes asolid state, the photoresist film 401 is removed from the wafer.Thereby, the posts 202 and the radiation post 207 are obtained.

[0053] Next, as shown in FIG. 5B, the posts 202, the re-tributes 204,the radiation post 207 and the insulating film 208 are sealed with thesealing resin 205 by using transfer-mold method or potting method or thelike.

[0054] Next, as shown in FIG. 5C, the entire surface of the sealingresin 205 is etched or grinded. As a result, the first end sides 202 aof the posts 202 and the main surfaces 207 a of the radiation post 207are exposed.

[0055] Next, as shown in FIG. 5D, the solder bumps 203 are mounted onthe first end sides 202 a of the posts 202 by using the screen-printingmethod, the solder-plating method or the super-soldering method or thelike.

[0056] In the process of manufacturing the resin sealed typesemiconductor device according to the first preferred embodiment of thepresent invention, the radiation post 207 can be formed simultaneouslyin the process of forming the posts 202. Therefore, any specialprocesses do not need to form the radiation post 207. Thus, theprocesses can be performed efficiently.

[0057] In FIGS. 1-2, owing to the explanatory circumstances, the numberof the posts 202, the solder bumps 203, the re-tributes 204 and the pad206 is limited to the specific number, i.e. two. However, even if theabove number is changed, the resin sealed type semiconductor deviceaccording to the first preferred embodiment of the present invention iscapable of getting the same effect.

[0058] (Second Embodiment)

[0059] A resin sealed type semiconductor device according to a secondpreferred embodiment of the present invention will be described withreference to FIGS. 6-8.

[0060] Frist, the composition of the resin sealed type semiconductordevice according to the second preferred embodiment will be describedwith reference to FIGS. 6-7. FIG. 6 is a plane view showing the resinsealed type semiconductor device having a wafer level chip size packagestructure individually divided from a wafer. FIG. 7 is a cross sectionalview taken line C-C of the semiconductor device shown in FIG. 6. Likeelements are given like or corresponding reference numerals in the firstand second preferred embodiments. Thus, dual explanations of the sameelements are avoided. The resin sealed type semiconductor deviceaccording to the second preferred embodiment of the present inventioncomprises a semiconductor chip 201, a plurality of posts 202, aplurality of solder bumps 203, a plurality of re-tribute 204, a sealingresin 205, a plurality of pads 206, a radiation post 207, an insulatingfilm 208 and a plurality of radiation bumps 701. As illustrated in FIG.6, two solder bumps 203 are located at both sides of the radiation bumps701. However, owing to an explanatory circumstance, the number of thepads, the re-tributes, the posts and the solder bumps is limited in FIG.7.

[0061] The difference between the first and the second preferredembodiments is that the radiation bumps 701 are mounted on the mainsurface 207 a of the radiation post 207.

[0062] The radiation bumps 701 which have the spherical shape, and arepreferably made of solder, and each one is mounted on the main surface207 a of the radiation post 207.

[0063] The radiation passes of the resin sealed type semiconductordevice according to the second preferred embodiment of the presentinvention will be described with reference to FIG. 8. FIG. 8 is a crosssectional view showing radiation passes of a resin sealed typesemiconductor device according to the second preferred embodiment. Theresin sealed type semiconductor device is connected to a substrate 801via the solder bumps 203 and the radiation bumps 701. The arrows shownin FIG. 8 designate the routes conducting the heat occurred in thesemiconductor chip 201. As shown in FIG. 8, the heat occurred in thesemiconductor chip 201 is radiated to the outside of the semiconductorchip 201 via the back and side surfaces of the semiconductor chip 201.In addition, the heat near the main surface 201 a of the semiconductorchip 201 is conducted to the substrate 801 via the posts 202 and thesolder bumps 203, and thus the heat is radiated to the outside of theresin sealed type semiconductor device. Furthermore, the heat near themain surface 201 a of the semiconductor chip 201 is radiated to an areawhich exists between the resin sealed type semiconductor deviceaccording to the second preferred embodiment and the substrate 801 viathe radiation post 207. Furthermore, the heat near the main surface 201a of the semiconductor chip 201 is conducted to the substrate 801 viathe radiation posts 207 and the radiation bumps 701.

[0064] The resin sealed type semiconductor device according to thesecond preferred embodiment of the present invention is capable ofradiating the heat occurred in the semiconductor chip 201 to its outsideby using the posts 202, the solder bumps 203 and the radiation post 207.Therefore, the resin sealed type semiconductor device according to thesecond preferred embodiment of the present invention is capable ofradiating the heat efficiently as compared with the conventional resinsealed type semiconductor device. Thus, the resin sealed typesemiconductor device according to the second preferred embodiment of thepresent invention is capable of reducing thermal resistance andcontrolling high temperature of the semiconductor chip as compared withthe conventional resin sealed type semiconductor device. As a result,the resin sealed type semiconductor device according to the secondpreferred embodiment having a longer lifetime can be obtained.

[0065] Furthermore, the resin sealed type semiconductor device accordingto the second preferred embodiment of the present invention has theradiation passes radiating the heat to its outside by using theradiation bumps 701. Thus, the resin sealed type semiconductor deviceaccording to the second preferred embodiment of the present invention iscapable of reducing thermal resistance and controlling high temperatureof the semiconductor chip as compared with the conventional resin sealedtype semiconductor device. As a result, the resin sealed typesemiconductor device according to the second preferred embodiment havinga longer lifetime can be obtained.

[0066] The process of manufacturing the resin sealed type semiconductordevice according to the second preferred embodiment of the presentinvention will be described with reference to FIGS. 4A-4D and 5A-5C. Thedrawings are the schematic enlarged sectional views a part of the wafer.All processes from a process of preparing the wafer 201 (refer to FIG.4A) to a process of exposing the first end sides 202 a of the posts 202and the main surface 207 a of the radiation post 207 (refer to FIG. 5C),are the same as those of the second embodiment.

[0067] The difference between the first and the second preferredembodiments is that the radiation bumps 701 are mounted on the mainsurface 207 a of the radiation post 207 during the process shown in FIG.5D. In detail, the solder bumps 203 and the radiation bumps 701 aremounted on the first end sides 202 a of the posts 202 and the mainsurface 207 a of the radiation post 207, respectively, by using thescreen-printing method, the solder-plating method or the super-solderingmethod, etc.

[0068] In the process of manufacturing the resin sealed typesemiconductor device according to the second preferred embodiment of thepresent invention, the radiation bumps 701 can be formed simultaneouslyin the process of forming the solder bumps 203. Therefore, any specialprocesses do not need to form the radiation bumps 701. Thus, theprocesses can be performed efficiently.

[0069] In FIGS. 6-7, owing to the explanatory circumstances, the numberof the posts 202, the solder bumps 203, the re-tributes 204, the pad 206and the radiation bumps 701 is limited to the specific number, i.e. two.However, even if the above number is changed, the resin sealed typesemiconductor device according to the second preferred embodiment of thepresent invention is capable of getting the same effect.

[0070] (Third Embodiment)

[0071] A resin sealed type semiconductor device according to a thirdpreferred embodiment of the present invention will be described withreference to FIGS. 9-10.

[0072] Frist, the composition of the resin sealed type semiconductordevice according to the third preferred embodiment will be describedwith reference to FIG. 9. FIG. 9 is a cross sectional view showing theresin sealed type semiconductor device according to the third preferredembodiment. Like elements are given like or corresponding referencenumerals in the first, second and third preferred embodiments. Thus,dual explanations of the same elements are avoided. The resin sealedtype semiconductor device according to the third preferred embodiment ofthe present invention comprises a semiconductor chip 201, a plurality ofposts 202, a plurality of solder bumps 203, a plurality of re-tribute204, a sealing resin 205, a plurality of pads 206, a radiation post 207,an insulating film 208, a plurality of radiation bumps 701 and a solderresist layer 901. Owing to an explanatory circumstance, the number ofthe pads, there-tributes, the posts and the solder bumps is limited inFIG. 9.

[0073] The difference among the first, the second and the thirdpreferred embodiments is that the solder resist layer 901 is formed onthe surface of the sealing resin 205 and the main surface 207 a of theradiation post 207.

[0074] The resin sealed type semiconductor device according to the thirdpreferred embodiment of the present invention is capable of radiatingthe heat occurred in the semiconductor chip 201 to its outside by usingthe posts 202, the solder bumps 203, the radiation post 207 and theradiation bumps 701. Therefore, the resin sealed type semiconductordevice according to the third preferred embodiment of the presentinvention is capable of radiating the heat efficiently as compared withthe conventional resin sealed type semiconductor device. Thus, the resinsealed type semiconductor device according to the third preferredembodiment of the present invention is capable of reducing thermalresistance and controlling high temperature of the semiconductor chip ascompared with the conventional resin sealed type semiconductor device.As a result, the resin sealed type semiconductor device according to thethird preferred embodiment having a longer lifetime can be obtained.Although the solder resist layer 901 is formed on the surface of thesealing resin 205 and the main surface 207 a of the radiation post 207,it goes without saying that the radiation efficiency of the heartoccurred in the semiconductor chip 201 is not inferior to theconventional resin sealed type semiconductor.

[0075] Furthermore, the resin sealed type semiconductor device of thethird embodiment of the present invention has the solder resist layer901. Thus, the solder bumps 203 and the radiation bumps 701 can bestably mounted on the posts 202 and the radiation posts 207,respectively. Even if the size of the solder bumps 203 differ from ofthe radiation bumps 701, the solder bumps 203 and the radiation bumps701 can be stably mounted on the posts 202 and the radiation posts 701,respectively, due to the solder resist layer 901. Therefore, the solderbumps 203 and the radiation bumps 701 can be mounted at the sameprocess. Any special processes do not need to form the radiation bumps701. Thus, the processes can be performed efficiently.

[0076] The process of manufacturing the resin sealed type semiconductordevice according to the third preferred embodiment of the presentinvention will be described with reference to FIGS. 10A-10C. Thedrawings are the schematic enlarged sectional views a part of the wafer.In the following explanations, the solder resist having a photosensitiveproperty is explained as an example of the solder resist layer 901.However, the solder resist layer 901 should not be limited to thephotosensitive solder resist. All processes from a process of preparingthe wafer 201 (refer to FIG. 4A) to a process of exposing the first endsides 202 a of the posts 202 and the main surface 207 a of the radiationpost 207 (refer to FIG. 5C), are the same as those of the thirdembodiment.

[0077] The difference among the first, the second and the thirdpreferred embodiments is that the processes shown in FIGS. 10A-10C areperformed instead of the process shown in FIG. 5D. After the processshown in FIG. 5C has been performed, as shown in FIG. 10A, thephotosensitive solder resist 901 is spin-coated on the surface of thesealing resin 205, the first end side 202 a of the post 202 and the mainsurface 207 a of the radiation post 207, then the spin-coatedphotosensitive solder resist 901 is temporarily dried.

[0078] Next, as shown in FIG. 10B, the temporarily dried solder resistlayer 901 is masked, and the masked solder resist layer 901 islithographed in order to expose a part of the first end sides 202 a ofthe posts 202 and a part of the main surfaces 207 a of the radiationposts 701. The size of the mask is set to the size of the solder bumps203 and the radiation bumps 701. The exposed solder resist layer 901 isdeveloped, and thus openings are formed in the solder resist layer 901.

[0079] Next, as shown in FIG. 10(c), the solder bumps 203 and theradiation bumps 701 are mounted on the exposed first end sides 202 a ofthe posts 202 and the exposed main surfaces 207 a of the radiation posts701 by using the screen-printing method, the solder-plating method orthe super-soldering method, etc.

[0080] In the process of manufacturing the resin sealed typesemiconductor device according to the third preferred embodiment of thepresent invention, the radiation bumps 701 can be formed simultaneouslyin the process of forming the solder bumps 203, even if there is adifference between the sizes of the solder bumps 203 and the radiationbumps 701. Therefore, any special processes do not need to form theradiation bumps 701. Thus, the processes can be performed efficiently.

[0081] In FIGS. 9-10, owing to the explanatory circumstances, the numberof the posts 202, the solder bumps 203, the re-tributes 204, the pad 206and the radiation bumps 701 is limited to the specific number, i.e. two.However, even if the above number is changed, the resin sealed typesemiconductor device according to the third preferred embodiment of thepresent invention is capable of getting the same effect.

[0082] (Fourth Embodiment)

[0083] A resin sealed type semiconductor device according to a fourthpreferred embodiment of the present invention will be described withreference to FIGS. 11A-11B.

[0084]FIG. 11 describes the arrangement relationship between theradiation posts 207 or the solder bumps 203. As shown in FIG. 11, theradiation posts 207 of the fourth embodiment of the present invention isformed at the various positions over the main surface 201 a of thesemiconductor chip 201. FIG. 11 does not show the radiation bumps 701which are formed on the radiation posts 207. However, it is clear thatthe radiation bumps 701 are mounted on the radiation posts 207 as theabove mentioned in the first and the second embodiments of the presentinvention.

[0085] In FIG. 11A, the radiation posts 207 are formed at the edge areaof the semiconductor chip 201. If the radiation posts 207 can not beformed at the central area of the semiconductor chip 201, the resinsealed type semiconductor device shown in FIG. 11A becomes effective.

[0086] In FIG. 11B, the radiation posts 207 are formed around specificsolder bumps 203. The resin sealed type semiconductor device is suitablefor radiating the heat of the specific solder bumps 203 which are highlyrequired to radiate the heat.

[0087] The resin sealed type semiconductor device according to thefourth preferred embodiment of the present invention is capable ofradiating the heat occurred in the semiconductor chip 201 to its outsideby using the posts 202, the solder bumps 203, the radiation post 207 andthe radiation bumps 701. Therefore, the resin sealed type semiconductordevice according to the fourth preferred embodiment of the presentinvention is capable of radiating the heat efficiently as compared withthe conventional resin sealed type semiconductor device. Thus, the resinsealed type semiconductor device according to the fourth preferredembodiment of the present invention is capable of reducing thermalresistance and controlling high temperature of the semiconductor chip ascompared with the conventional resin sealed type semiconductor device.As a result, the resin sealed type semiconductor device according to thefourth preferred embodiment having a longer lifetime can be obtained.

[0088] While the preferred form of the present invention has beendescribed, it is to be understood that modifications will be apparent tothose skilled in the art without departing from the spirit of theinvention.

[0089] The scope of the invention, therefore, is to be determined solelyby the following claims.

What is claimed is:
 1. A semiconductor device, comprising: asemiconductor chip which has a pad formed on a main surface thereof; aninsulating film which is formed on a part of said pad and on said mainsurface of said semiconductor chip; an interconnection which is formedon a part of said insulating film and which is electrically connected tosaid pad; a sealing resin which seals said interconnection and saidinsulating film; a post formed on said interconnection which has asurface exposed to outside of said sealing resin which is electricallyconnected to said interconnection; a bump electrode which is mounted onsaid exposed surface of said post; and a radiation post which is formedon said insulating film and which has a surface exposed to outside ofsaid sealing resin.
 2. The semiconductor device in accordance with claim1 , said semiconductor device further comprising; a radiation bump unitwhich is formed on said exposed surface of said radiation post.
 3. Thesemiconductor device in accordance with claim 2 , wherein said radiationbump is spherical shape.
 4. The semiconductor device in accordance withclaim 1 , wherein said radiation post which is provided over the centerof said main surface of said semiconductor chip; and said post which isprovided over the periphery of said main surface of said semiconductorchip.
 5. The semiconductor device in accordance with claim 4 , saidsemiconductor device further comprising; a radiation bump which isformed on said exposed surface of said radiation post.
 6. Thesemiconductor device in accordance with claim 1 , wherein said radiationpost is provided at the outermost of said main surface of saidsemiconductor chip.
 7. The semiconductor device in accordance with claim6 , said semiconductor device further comprising; a radiation bump whichis formed on said exposed surface of said radiation post.
 8. Thesemiconductor device in accordance with claim 7 , wherein said radiationbump is spherical shape.
 9. The semiconductor device in accordance withclaim 1 , wherein said radiation post is provided around said solderbump.
 10. The semiconductor device in accordance with claim 9 , saidsemiconductor device further comprising; a radiation bump which isformed on said exposed surface of said radiation post.
 11. Thesemiconductor device in accordance with claim 10 , wherein saidradiation bump is spherical shape.
 12. A method of manufacturing asemiconductor device, said method including: providing a wafer having amain surface on which a pad is formed; forming an insulating film on apart of said pad and on said main surface of said wafer; forming aninterconnection on a part of said insulating film to connect to saidpad; providing a resist film having first and second openings to exposeportions of said insulating film and said interconnection; filling saidfirst and second openings with a plating liquid to form a post and aradiation post in said first and second openings respectively; removingsaid resist film; and sealing said interconnection, said insulating filmand side surfaces of said post and said radiation post.
 13. The methodof claim 12 , said method further comprising: removing said sealingresin until top surfaces of said post and said radiation post areexposed.
 14. The method of claim 12 , said method further comprising:forming a radiation bump on top surface of said radiation post.